PPT On RTOS
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RTOS Presentation Transcript:
1. Abstract RTOS Modeling for Embedded Systems2. Outline
Introduction to SoC and OS Design Related Work Design Flow RTOS Model Task Model Scheduler Model Synchronization Model Case Study Conclusions and Future Works
3. Introduction to SoC Design
ITRS, 70% of ASICS will be SoC in 2005; Dedicated Software complexity larger than HW in 2005; ITRS, Embedded SW represents 80% design cost for SoCs; 10 000 new SoC Designs Generic SoC platform (programmable, configurable, …) Specific SoCs with heterogeneous components (RF, Analog, MEMS, …) 100 Bn$ market; STB, Multimedia, network processors, mobile terminals, and game applications require multiprocessors and will drive the semiconductor market.
4. Introduction to SoC Design, cont´d
SoC Components: Heterogeneous Hardware Specific hardware (DSP, IP, Memory, non digital…) Communication Network Non structured logic to links components to Network Sophisticated Software High level SW (Application/OS) Low level SW (Dedicated CPU, ASIP, DSP) Multi-disciplinary knowledge is required: Heterogeneous processors: different CPU cultures; Sophisticated communication protocols and On-Chip networks. SoC architecture design flow should enable the designer To master the design complexity; To meet the time-to-market.
5. Operating Systems Principles
HW/SW issues: Large variety of processors, difficult to program Sequential software execution, distributed and parallel functions The solution: operating system Abstraction of hardware, multitasking
6. OS Design Challenges
Current RTOS design: SoCs design: high abstraction levels; Low abstraction level (RTL); RTL OS implementation used in higher abstraction levels (negating the abstract system model principles); Validation of RTOS implementations in HW/SW simulation; Current SLDLs lack support for modeling an RTOS at higher abstraction levels Need new design methodologies and techniques to enable RTOS Design
7. Objective and Problems
Objective: fast and accurate RTOS simulation model Abstract RTOS model, higher abstraction levels (Application level) Timing simulation for the final RTOS implementation Problems How to build such a simulation model? executed on the host machine, OS simulation models Advantage/Limitation: simulation speed/lack in accuracy Timing simulation Delay annotation to the sw code (estimation/back annotation) Resources sharing, multi-task management Real-time services I/O = adapts to different I/O schemes Synchronization = interrupts management Task inter-dependence = avoids dead locks
8. Related Work
Low level models: Kohout: specific hw for few OS operations; Wang: synthesize OS based on device drivers; O´Nil: OS library to generate device drivers; Yi: model the OS in the cosimulation backplane at RTL level (ISS); Cortadella: combine static and dynamic scheduling; Gauthier: methodology for automatic generation of application-specific OS; High level models Desmet (SoCOS): emphasis on the task concurrency issues, requires own proprietary simulation engine; Gonzales/Madsen: based on master-slave SystemC library; Gerstlauer/Gajski: OS model to extend SpecC language, hard and complex to adapt to another SLDL; Our approach: RTOS model based on SystemC (untimed system specification – Transaction level modeling);
9. RTOS Model
Build on the top of SystemC language; A RTOS model library provides the common services of a RTOS; The model supports periodic and non-periodic soft real-time tasks; SystemC lacks support to model dynamic real-time behavior; Need language extensions; Two major categories of services: OS management Task management
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